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Technology Description

NASA Earth-orbiting missions and commercial satellite systems require downlink data rates of several hundred megabits per second. To address this need, researchers at NASA Goddard Space Flight Center and the Jet Propulsion Laboratory developed an all-digital demodulator for receiving radio signals with multi-gigahertz carrier frequencies.

Using parallel processing algorithms, the HRDD chip processes samples at a data rate of 300-600 million symbols per second. HRDD uses all digital parallel processing, making it much more flexible and reliable. It also costs less to produce and operate because it enables the use of complementary metal oxide semiconductor (CMOS) circuitry that is less expensive, more reliable, and uses less power. Its flexibility enables its use with off-the-shelf, computer-controlled components.

Spin-out and Spin-in Success

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In March of 2004, the HRDD was licensed to Kongsberg Spacetec, a Norwegian company that had previously worked with NASA at the Svalbard Ground Station in Norway.  They were seeking to build ground support data recovery systems for both NASA and the private sector.

Working closely with NASA and the Consolidated Space Operations Contract (CSOC), Kongsberg is building a product for use in Earth-observation satellite data receiving. The HRDD chip is a key component of this receiver. Upon developing this technology, Kongsberg will be able to provide NASA with low-cost, integrated, and reliable systems.

Contact

Innovative Partnerships Program Office
NASA Goddard Space Flight Center
Phone: (301) 286-2642
E-mail: techtransfer@gsfc.nasa.gov


APRX Architecture

The APRX Architecture provides for most digital signal processing to be done in the frequency domain. Here, "z–1" denotes a digital sample delay, "Ø16" signifies decimation by a factor of 16, and Hi denotes a complex time-varying matched/detection filter bank that also performs the functions of low-pass digital filter and symbol timing recovery.